1. Field of the invention
The invention relates to a semiconductor device formed on a bulk substrate or SOI (silicon on insulator) substrate and a method of manufacturing the same and, more specifically, to a semiconductor device having an interface of a silicon material and a metal silicide wherein the silicon material and the metal silicide have a high grid alignment at their interface.
2. Description of the related art
In the related art, a metal silicide is formed by forming a metal layer on a silicon layer by a well-known sputtering method, and by a subsequent thermal treatment. The metal silicide is widely used to minimize parasitic resistances of a transistor in a semiconductor device because the resistivity of the metal silicide is much smaller than that of silicon. To form the metal silicide in a semiconductor wafer process, a metal layer is formed on the entire surface of a silicon substrate after transistors including sources, drains and patterned gates, are formed. Then, the semiconductor wafer is subjected to heat. By this thermal treatment, the metal silicide is formed by reacting silicon with metal, wherein heat is applied only at an area where silicon contacts the metal. This method of forming the metal silicide is called “self-aligned silicide” or “salicide” because a patterning process or an alignment process of the silicide is not required. In the method, since the remaining metal, which is not reacted with silicon, is removed by using an anmoniacal solution bath, isolation between semiconductor elements can be maintained.
Currently, titanium (Ti), nickel (Ni) and cobalt (Co) are used as the metal material in the salicide process. Each of the metal silicides formed from these metals has more than two stable phases, which are determined by the temperature at which the metal silicide is formed. For example, when cobalt is reacted with silicon to form cobalt silicide, CoSi or CoSi2 is formed. CoSi is stable when the reaction is performed at a relatively low temperature. On the other hand, CoSi2 is stable when the reaction is performed at a relatively high temperature.
Using the metal silicide in the lowest resistivity phase is effective in reducing the parasitic resistance of the transistor. However, the thermal treatment at a high temperature is required to form the metal silicide in the lowest resistivity phase. When the thermal treatment at the high temperature is performed, the metal silicide reaction is apt to progress horizontally beneath the field oxide layer. As a result, isolation between the transistors may not be maintained. To avoid this problem, the thermal treatment is divided into more than two operations. In a first treatment process, a first metal silicide in a first stable phase is formed at a low temperature. Then, after unreacted metal is removed using an anmoniacal solution bath, the first metal silicide is transformed to a second metal silicide in a second stable phase by a second thermal treatment at a high temperature. The second metal silicide in the second stable phase has low resistivity characteristic because it is formed at a high temperature.
For example, cobalt silicide is formed by the following process. First, a cobalt layer is formed on the entire surface of the silicon substrate after transistors having sources, drains and patterned gates, are formed. Next, by subjecting the silicon substrate to a first thermal treatment at 550° C. for 30 seconds, a first cobalt silicide in a phase in which cobalt mono-silicide (CoSi) layer is a core, is formed from the cobalt and silicon. The first cobalt silicide also includes some metal-rich Co2Si. Then, after the unreacted cobalt is removed by using an anmoniacal solution bath, the silicon substrate is subjected in a second thermal treatment at 800° C. for 30 seconds to form a second cobalt silicide in a second phase. The second cobalt silicide is composed of a stable cobalt di-silicide (CoSi2) phase having low resistivity. In this silicidation process, the relationship between silicon, cobalt and cobalt silicide is as follows. When the entire cobalt layer is transformed to the cobalt silicide, CoSi2 consumes twice the amount of silicon as compared to CoSi. On the other hand, when a fixed amount of silicon is transformed to the cobalt silicide, CoSi consumes twice the amount of cobalt as compared to CO Si2.
In the salicide process of the related art described above, the quality of the interface junction structure between the silicon layer of the channel region and the metal silicide layer is not good. That is, the crystallographic structure of the silicon is not harmonized with the crystallographic structure of the silicide. The reason of this phenomenon is not clear. However, it is considered that this phenomenon relates to the direction in which the silicidation progresses. In other words, the silicidation progresses in multiple directions in the related art. As a result of this phenomenon, problems of junction leakage or parasitic resistance (explained later) may occur.